OcPciIoU.c File Reference

#include "OcPciIoU.h"

Go to the source code of this file.

Functions
EFI_CPU_IO2_PROTOCOL *	InitializeCpuIo2 (VOID)
EFI_STATUS	CpuIoCheckParameter (IN BOOLEAN MmioOperation, IN EFI_CPU_IO_PROTOCOL_WIDTH Width, IN UINT64 Address, IN UINTN Count, IN VOID *Buffer)
EFI_STATUS EFIAPI	CpuMemoryServiceRead (IN EFI_CPU_IO2_PROTOCOL *This, IN EFI_CPU_IO_PROTOCOL_WIDTH Width, IN UINT64 Address, IN UINTN Count, OUT VOID *Buffer)
EFI_STATUS EFIAPI	CpuMemoryServiceWrite (IN EFI_CPU_IO2_PROTOCOL *This, IN EFI_CPU_IO_PROTOCOL_WIDTH Width, IN UINT64 Address, IN UINTN Count, IN VOID *Buffer)
EFI_STATUS EFIAPI	RootBridgeIoMemRead (IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width, IN UINT64 Address, IN UINTN Count, OUT VOID *Buffer)
EFI_STATUS EFIAPI	RootBridgeIoMemWrite (IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width, IN UINT64 Address, IN UINTN Count, IN VOID *Buffer)

Variables
STATIC EFI_CPU_IO2_PROTOCOL *	mCpuIo = NULL
STATIC CONST UINT8	mInStride []
STATIC CONST UINT8	mOutStride []

Detailed Description

EFI PCI IO protocol functions implementation for PCI Bus module.

Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.
Copyright (c) 2023, xCuri0. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent

Definition in file OcPciIoU.c.

Function Documentation

CpuIoCheckParameter()

EFI_STATUS CpuIoCheckParameter	(	IN BOOLEAN	MmioOperation,
		IN EFI_CPU_IO_PROTOCOL_WIDTH	Width,
		IN UINT64	Address,
		IN UINTN	Count,
		IN VOID *	Buffer )

Check parameters to a CPU I/O 2 Protocol service request.

The I/O operations are carried out exactly as requested. The caller is responsible for satisfying any alignment and I/O width restrictions that a PI System on a platform might require. For example on some platforms, width requests of EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will be handled by the driver.

Parameters

[in]	MmioOperation	TRUE for an MMIO operation, FALSE for I/O Port operation.
[in]	Width	Signifies the width of the I/O or Memory operation.
[in]	Address	The base address of the I/O operation.
[in]	Count	The number of I/O operations to perform. The number of bytes moved is Width size * Count, starting at Address.
[in]	Buffer	For read operations, the destination buffer to store the results. For write operations, the source buffer from which to write data.

Return values

EFI_SUCCESS	The parameters for this request pass the checks.
EFI_INVALID_PARAMETER	Width is invalid for this PI system.
EFI_INVALID_PARAMETER	Buffer is NULL.
EFI_UNSUPPORTED	The Buffer is not aligned for the given Width.
EFI_UNSUPPORTED	The address range specified by Address, Width, and Count is not valid for this PI system.

Definition at line 97 of file OcPciIoU.c.

CpuMemoryServiceRead()

EFI_STATUS EFIAPI CpuMemoryServiceRead	(	IN EFI_CPU_IO2_PROTOCOL *	This,
		IN EFI_CPU_IO_PROTOCOL_WIDTH	Width,
		IN UINT64	Address,
		IN UINTN	Count,
		OUT VOID *	Buffer )

Reads memory-mapped registers.

The I/O operations are carried out exactly as requested. The caller is responsible for satisfying any alignment and I/O width restrictions that a PI System on a platform might require. For example on some platforms, width requests of EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will be handled by the driver.

If Width is EfiCpuIoWidthUint8, EfiCpuIoWidthUint16, EfiCpuIoWidthUint32, or EfiCpuIoWidthUint64, then both Address and Buffer are incremented for each of the Count operations that is performed.

If Width is EfiCpuIoWidthFifoUint8, EfiCpuIoWidthFifoUint16, EfiCpuIoWidthFifoUint32, or EfiCpuIoWidthFifoUint64, then only Buffer is incremented for each of the Count operations that is performed. The read or write operation is performed Count times on the same Address.

If Width is EfiCpuIoWidthFillUint8, EfiCpuIoWidthFillUint16, EfiCpuIoWidthFillUint32, or EfiCpuIoWidthFillUint64, then only Address is incremented for each of the Count operations that is performed. The read or write operation is performed Count times from the first element of Buffer.

Parameters

[in]	This	A pointer to the EFI_CPU_IO2_PROTOCOL instance.
[in]	Width	Signifies the width of the I/O or Memory operation.
[in]	Address	The base address of the I/O operation.
[in]	Count	The number of I/O operations to perform. The number of bytes moved is Width size * Count, starting at Address.
[out]	Buffer	For read operations, the destination buffer to store the results. For write operations, the source buffer from which to write data.

Return values

EFI_SUCCESS	The data was read from or written to the PI system.
EFI_INVALID_PARAMETER	Width is invalid for this PI system.
EFI_INVALID_PARAMETER	Buffer is NULL.
EFI_UNSUPPORTED	The Buffer is not aligned for the given Width.
EFI_UNSUPPORTED	The address range specified by Address, Width, and Count is not valid for this PI system.

Definition at line 228 of file OcPciIoU.c.

CpuMemoryServiceWrite()

EFI_STATUS EFIAPI CpuMemoryServiceWrite	(	IN EFI_CPU_IO2_PROTOCOL *	This,
		IN EFI_CPU_IO_PROTOCOL_WIDTH	Width,
		IN UINT64	Address,
		IN UINTN	Count,
		IN VOID *	Buffer )

Writes memory-mapped registers.

The I/O operations are carried out exactly as requested. The caller is responsible for satisfying any alignment and I/O width restrictions that a PI System on a platform might require. For example on some platforms, width requests of EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will be handled by the driver.

If Width is EfiCpuIoWidthUint8, EfiCpuIoWidthUint16, EfiCpuIoWidthUint32, or EfiCpuIoWidthUint64, then both Address and Buffer are incremented for each of the Count operations that is performed.

If Width is EfiCpuIoWidthFifoUint8, EfiCpuIoWidthFifoUint16, EfiCpuIoWidthFifoUint32, or EfiCpuIoWidthFifoUint64, then only Buffer is incremented for each of the Count operations that is performed. The read or write operation is performed Count times on the same Address.

If Width is EfiCpuIoWidthFillUint8, EfiCpuIoWidthFillUint16, EfiCpuIoWidthFillUint32, or EfiCpuIoWidthFillUint64, then only Address is incremented for each of the Count operations that is performed. The read or write operation is performed Count times from the first element of Buffer.

Parameters

[in]	This	A pointer to the EFI_CPU_IO2_PROTOCOL instance.
[in]	Width	Signifies the width of the I/O or Memory operation.
[in]	Address	The base address of the I/O operation.
[in]	Count	The number of I/O operations to perform. The number of bytes moved is Width size * Count, starting at Address.
[in]	Buffer	For read operations, the destination buffer to store the results. For write operations, the source buffer from which to write data.

Return values

EFI_SUCCESS	The data was read from or written to the PI system.
EFI_INVALID_PARAMETER	Width is invalid for this PI system.
EFI_INVALID_PARAMETER	Buffer is NULL.
EFI_UNSUPPORTED	The Buffer is not aligned for the given Width.
EFI_UNSUPPORTED	The address range specified by Address, Width, and Count is not valid for this PI system.

Definition at line 309 of file OcPciIoU.c.

InitializeCpuIo2()

EFI_CPU_IO2_PROTOCOL * InitializeCpuIo2

(

VOID

)

Definition at line 48 of file OcPciIoU.c.

RootBridgeIoMemRead()

EFI_STATUS EFIAPI RootBridgeIoMemRead	(	IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *	This,
		IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH	Width,
		IN UINT64	Address,
		IN UINTN	Count,
		OUT VOID *	Buffer )

Enables a PCI driver to access PCI controller registers in the PCI root bridge memory space.

The Mem.Read(), and Mem.Write() functions enable a driver to access PCI controller registers in the PCI root bridge memory space. The memory operations are carried out exactly as requested. The caller is responsible for satisfying any alignment and memory width restrictions that a PCI Root Bridge on a platform might require.

Parameters

[in]	This	A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
[in]	Width	Signifies the width of the memory operation.
[in]	Address	The base address of the memory operation. The caller is responsible for aligning the Address if required.
[in]	Count	The number of memory operations to perform. Bytes moved is Width size * Count, starting at Address.
[out]	Buffer	For read operations, the destination buffer to store the results. For write operations, the source buffer to write data from.

Return values

EFI_SUCCESS	The data was read from or written to the PCI root bridge.
EFI_INVALID_PARAMETER	Width is invalid for this PCI root bridge.
EFI_INVALID_PARAMETER	Buffer is NULL.
EFI_OUT_OF_RESOURCES	The request could not be completed due to a lack of resources.

Definition at line 378 of file OcPciIoU.c.

RootBridgeIoMemWrite()

EFI_STATUS EFIAPI RootBridgeIoMemWrite	(	IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *	This,
		IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH	Width,
		IN UINT64	Address,
		IN UINTN	Count,
		IN VOID *	Buffer )

Enables a PCI driver to access PCI controller registers in the PCI root bridge memory space.

The Mem.Read(), and Mem.Write() functions enable a driver to access PCI controller registers in the PCI root bridge memory space. The memory operations are carried out exactly as requested. The caller is responsible for satisfying any alignment and memory width restrictions that a PCI Root Bridge on a platform might require.

Parameters

[in]	This	A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
[in]	Width	Signifies the width of the memory operation.
[in]	Address	The base address of the memory operation. The caller is responsible for aligning the Address if required.
[in]	Count	The number of memory operations to perform. Bytes moved is Width size * Count, starting at Address.
[in]	Buffer	For read operations, the destination buffer to store the results. For write operations, the source buffer to write data from.

Return values

EFI_SUCCESS	The data was read from or written to the PCI root bridge.
EFI_INVALID_PARAMETER	Width is invalid for this PCI root bridge.
EFI_INVALID_PARAMETER	Buffer is NULL.
EFI_OUT_OF_RESOURCES	The request could not be completed due to a lack of resources.

Definition at line 433 of file OcPciIoU.c.

Variable Documentation

mCpuIo

STATIC EFI_CPU_IO2_PROTOCOL* mCpuIo = NULL

Definition at line 12 of file OcPciIoU.c.

mInStride

STATIC CONST UINT8 mInStride[]

Initial value:

= {
  1,      
  2,      
  4,      
  8,      
  0,      
  0,      
  0,      
  0,      
  1,      
  2,      
  4,      
  8       
}

Definition at line 14 of file OcPciIoU.c.

mOutStride

STATIC CONST UINT8 mOutStride[]

Initial value:

= {
  1,      
  2,      
  4,      
  8,      
  1,      
  2,      
  4,      
  8,      
  0,      
  0,      
  0,      
  0       
}

Definition at line 32 of file OcPciIoU.c.