PciExtInternal.h

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#ifndef PCI_EXT_INTERNAL_H
#define PCI_EXT_INTERNAL_H
 
#define PCI_BRIDGE_RCBA_OFFSET  0xF0U
 
#define PCI_BRIDGE_RCBA_ADDRESS_MASK  0xFFFFC000U
 
#define PCI_BRIDGE_RCBA_ACCESS_ENABLE  BIT0
 
#define RCBA_HTPC_REGISTER  0x3404U
 
#define RCBA_HTPC_HPET_ENABLE  BIT7
 
#define XHC_HCCPARAMS_OFFSET      0x10
#define XHC_NEXT_CAPABILITY_MASK  0xFF00
#define XHC_CAPABILITY_ID_MASK    0xFF
#define XHC_USBCMD_OFFSET         0x0    
#define XHC_USBSTS_OFFSET         0x4    
#define XHC_POLL_DELAY            1000
 
#define EHC_BAR_INDEX         0x0
#define EHC_HCCPARAMS_OFFSET  0x8
#define EHC_USBCMD_OFFSET     0x0        
#define EHC_USBSTS_OFFSET     0x4        
#define EHC_USBINT_OFFSET     0x8        
 
#define PCI_CLASS_MEDIA_HDA  0x03
 
#define PCI_MEDIA_TCSEL_OFFSET  0x44U
 
#define TCSEL_CLASS_MASK  0x7U
 
#define PCI_BAR_CAP_1MB    BIT0
#define PCI_BAR_CAP_2MB    BIT1
#define PCI_BAR_CAP_4MB    BIT2
#define PCI_BAR_CAP_8MB    BIT3
#define PCI_BAR_CAP_16MB   BIT4
#define PCI_BAR_CAP_32MB   BIT5
#define PCI_BAR_CAP_64MB   BIT6
#define PCI_BAR_CAP_128MB  BIT7
#define PCI_BAR_CAP_256MB  BIT8
#define PCI_BAR_CAP_512MB  BIT9
#define PCI_BAR_CAP_1GB    BIT10
#define PCI_BAR_CAP_2GB    BIT11
#define PCI_BAR_CAP_4GB    BIT12
#define PCI_BAR_CAP_8GB    BIT13
#define PCI_BAR_CAP_16GB   BIT14
#define PCI_BAR_CAP_32GB   BIT15
#define PCI_BAR_CAP_64GB   BIT16
#define PCI_BAR_CAP_128GB  BIT17
#define PCI_BAR_CAP_256GB  BIT18
#define PCI_BAR_CAP_512GB  BIT19
 
#define PCI_BAR_CAP_LIMIT(BarSize)  ((1U << ((BarSize) + 1)) - 1)
 
#endif // PCI_EXT_INTERNAL_H